An integrated circuit (IC) includes core logic circuits and input/output (IO) circuits. The core logic circuits perform a desired function and require a low voltage termed as core supply voltage. The IC communicates with other ICs or external devices (filters, sensors etc.) at high voltage range termed as the IO supply voltage. The IO circuits acts as interface between core logic circuits and external devices. The IO circuits are connected to external devices through board traces or metal wires, called transmission lines. An IO circuit includes a driver that drive signals on a PAD to interface with the external devices. A bidirectional IO circuit has a driver used for sending signals to the external devices (transmission mode) and a receiver for receiving signals from the external devices (receive mode). The increasing complexity and performance requirements of portable media devices call for effective IO circuits with high voltage drivers that provide the voltage transition between the IO supply voltage devices and logic circuits operating at core supply voltages. The high speed LVCMOS (low voltage complementary metal oxide semiconductor) bidirectional IOs face reliability issues arising due to the overshoot voltages and the undershoot voltages at the IO circuit interface caused by impedance mismatch between the external device and the transmission line.
The difference between the core supply voltage and IO supply voltage is large at advanced technology nodes. Hence, it is difficult to fabricate IO circuits and core logic circuits on the same IC without compromising on device density. At advanced technology nodes, the aim is to reduce the cost of the mask and increase the device density. Therefore, low voltage devices are used to fabricate IO circuits and the reliability concerns are addressed either through design engineering, device engineering or both. The IO circuit typically has a driver built from MOSFETs (Metal oxide semiconductor field effect transistors). The MOSFETs are low voltage devices and can withstand higher supply voltages received from the external devices only to an extent, and any small increase in the supply voltage thereafter results in severe reliability concerns. Hence, the overshoot voltage and the undershoot voltages at the pad during the receive mode tend to significantly overstress the MOSFETs thereby increasing the failure rate of the IC. There are several mechanisms in the literature which are used to clamp the voltages received at the pad above the rail voltages (i.e. VDDS and GND). However, these mechanisms require a reference voltage generated internally on the IC. This adds additional power consumption and complexity to the IO circuit design.